The present invention relates to a refresh system for a dynamic memory such as a dynamic random access memory.
A dynamic random access memory (RAM) is superior to a static RAM and a C-MOS RAM, because the dynamic RAM provides a great memory capacity with a low cost. However, the dynamic RAM inevitably requires a refresh system for maintaining the memory data therein. The dynamic RAM also consumes more electric power than the C-MOS RAM. Accordingly, in the conventional system, the dynamic RAM is used only for an outer memory or a buffer memory for the outer memory, wherein a memory backup is not required.
If the dynamic RAM is incorporated in a system, the electric power must be continuously applied to a peripheral circuit of the dynamic RAM even when a main power supply is terminated, for memory backup purposes. One conventional memory backup method is to employ a circuit for continuously applying A.C. power to the peripheral circuit of the dynamic RAM even though the system operation is not required. In this method, an additional A.C. power input system is required for the peripheral circuit of the dynamic RAM. Another conventional memory backup method is to employ a battery of great capacity for supplying power to the entire system while the main power supply is interrupted. This method is not practical since a large capacity battery is required.
Accordingly, an object of the present invention is to provide a novel memory refresh system for a dynamic memory.
Another object of the present invention is to provide a control circuit for enhancing the reliability of a dynamic random access memory (RAM).
Still another object of the present invention is to provide a memory backup system for a dynamic RAM, which requires a small capacity battery.
Other objects and further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
To achieve the above objects, pursuant to an embodiment of the present invention, an electronic apparatus includes a central processor unit (CPU) which develops a first refresh control signal for refreshing the memory data stored in the dynamic RAM. Another refresh control circuit is provided for developing a second refresh control signal to maintain the memory data stored in the dynamic RAM. When the main power is applied to the electronic apparatus, the dynamic RAM receives the first refresh control signal derived from the CPU. When the main power supply is interrupted, the dynamic RAM receives the second refresh control signal derived from the refresh control circuit which is operated by a small capacity battery.